OFF-State Leakage and Performance Variations Associated with Germanium Preamorphization Implant in Silicon-Germanium Channel pFET
- Vishal A. Tiwari
- Rama Divakaruni
- et al.
- 2018
- IEEE T-ED
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45 results for Rama Divakaruni
Integrated dual SPE processes with low contact resistivity for future CMOS technologies
- Heng Wu
- Soon-Cheon Seo
- et al.
- 2017
- IEDM 2017
Analysis of systematic and random variation of gate-induced drain leakage in silicon-germanium channel pFET
- Vishal A. Tiwari
- Ch. L. N. Pavan
- et al.
- 2016
- ICEE 2016
Stacked nanosheet gate-all-around transistor to enable scaling beyond FinFET
- N. Loubet
- T.B. Hook
- et al.
- 2017
- VLSI Technology 2017
Technology viable DC performance elements for Si/SiGe channel CMOS FinFTT
- G. Tsutsui
- Ruqiang Bao
- et al.
- 2016
- IEDM 2016
A 7nm FinFET technology featuring EUV patterning and dual strained high mobility channels
- Ruilong Xie
- Pietro Montanini
- et al.
- 2016
- IEDM 2016
Air spacer for 10nm FinFET CMOS and beyond
- K. Cheng
- C. Park
- et al.
- 2016
- IEDM 2016
FINFET technology featuring high mobility SiGe channel for 10nm and beyond
- Dechao Guo
- G. Karve
- et al.
- 2016
- VLSI Technology 2016
Challenges of 10 nm and 7 nm CMOS for server and mobile applications
- Rama Divakaruni
- Vijay Narayanan
- 2016
- ECS Meeting 2016
Effects of trap-assisted tunneling on gate-induced drain leakage in silicon-germanium channel p-type FET for scaled supply voltages
- Vishal A. Tiwari
- Rama Divakaruni
- et al.
- 2016
- Japanese Journal of Applied Physics