Modeling and analysis of gate leakage in ultra-thin oxide sub-50nm double gate devices and circuits
- Saibal Mukhopadhyay
- Keunwoo Kim
- et al.
- 2005
- ISQED 2005
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21 results for Shih Hsien Lo
Analysis and design of digital CMOS circuits in hybrid SOI-epitaxial technology with different crystal orientations
- Koushik K. Das
- Shih-Hsien Lo
- et al.
- 2004
- IEEE International SOI Conference 2004
Challenges for accurate reliability projections in the ultra-thin oxide regime
- E. Wu
- W.W. Abadeer
- et al.
- 1999
- IRPS 1999
Modeling and characterization of quantization, polysilicon depletion, and direct tunneling effects in MOSFETs with ultrathin oxides
- S.H. Lo
- D.A. Buchanan
- et al.
- 1999
- IBM J. Res. Dev
Atomic-scale studies of electron transport through MOS structures
- H.J. Wen
- R. Ludeke
- et al.
- 1998
- Applied Surface Science
Electrical characteristics and reliability of sub-3 nm gate oxides grown on nitrogen implanted silicon substrates
- L.K. Han
- S.W. Crowder
- et al.
- 1997
- IEDM 1997
Modeling and characterization of n+- and p+-polysilicon-gated ultra-thin oxides (21-26 angstroms)
- S.H. Lo
- D.A. Buchanan
- et al.
- 1997
- VLSI Technology 1997
Quantum-mechanical modeling of electron tunneling current from the inversion layer of ultra-thin-oxide nMOSFET's
- S.H. Lo
- D.A. Buchanan
- et al.
- 1997
- IEEE Electron Device Letters
Image force effects and the dielectric response of SiO2 in electron transport across metal-oxide-semiconductor structures
- H.J. Wen
- R. Ludeke
- et al.
- 1997
- Journal of Vacuum Science and Technology A: Vacuum, Surfaces and Films
Reliability and integration of ultra-thin gate dielectrics for advanced CMOS
- D.A. Buchanan
- S.H. Lo
- 1997
- Microelectronic Engineering