Accurate performance evaluation for the horizontal nanosheet standard-cell design space beyond 7nm technologyYoo-Mi LeeMyung-Hee Naet al.2017IEDM 2017
Methodology Development to Benchmark Power Delivery Designs in Advanced Technology NodesNicholas A. LanzilloA. Chuet al.2023SPIE Advanced Lithography + Patterning 2023
Challenges and Opportunities for Stacked Transistor: DTCO and DeviceJ. WangS.D. Suket al.2021VLSI Technology 2021
Rapid and Holistic Technology Evaluation for Exploratory DTCO in beyond 7nm TechnologiesMyung-Hee NaAlbert Chuet al.2018SISPAD 2018
Benchmarking Power Delivery Network Designs at the 5-nm Technology NodeNicholas A. LanzilloAlbert M. Chuet al.2021IEEE T-ED
Power Delivery Design, Signal Routing, and Performance of On-Chip Cobalt Interconnects in Advanced Technology NodesNicholas A. LanzilloAlbert Chuet al.2021IEEE Transactions on VLSI Systems