Next Generation Infrared (IR) Laser Debonding / Silicon Handle Technology for Precision Chiplet Technology Applications
- Qianwen Chen
- Michael Belyansky
- et al.
- 2023
- ECTC 2023
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22 results for Michael Belyansky
Overlay Performance in Permanent Bonded Wafer Integration Schemes
- Nathan Ip
- Michael Belyansky
- et al.
- 2023
- SPIE Advanced Lithography + Patterning 2023
Surface Energy Characterization for Die-Level Cu Hybrid Bonding
- Katsuyuki Sakuma
- Roy Yu
- et al.
- 2022
- ECTC 2022
A new technique for evaluating stacked nanosheet inner spacer TDDB reliability
- Tian Shen
- K. Watanabe
- et al.
- 2020
- IRPS 2020
A Novel Dry Selective Etch of SiGe for the Enablement of High Performance Logic Stacked Gate-All-Around NanoSheet Devices
- Nicolas Loubet
- T. Devarajan
- et al.
- 2019
- IEDM 2019
Self-Allancd Gate Contact (SAGC) for CMOS technology scaling beyond 7nm
- Ruilong Xie
- Chanro Park
- et al.
- 2019
- VLSI Technology 2019
Study of alternate hardmasks for extreme ultraviolet patterning
- Anuja De Silva
- Indira Seshadri
- et al.
- 2016
- JVSTB
Atomic layer deposition of sidewall spacers: Process, equipment and integration challenges in state-of-the-art logic technologies
- Michael Belyansky
- Richard Conti
- et al.
- 2014
- ECS Meeting 2014
Characterization and mitigation of overlay error on silicon wafers with nonuniform stress
- T.A. Brunner
- V. Menon
- et al.
- 2014
- SPIE Advanced Lithography 2014
Characterization of wafer geometry and overlay error on silicon wafers with nonuniform stress
- Timothy A. Brunner
- Vinayan C. Menon
- et al.
- 2013
- Journal of Micro/Nanolithography, MEMS, and MOEMS