Challenges and solutions of FinFET integration in an SRAM cell and a logic circuit for 22 nm node and beyond
- H. Kawasaki
- V.S. Basker
- et al.
- 2009
- IEDM 2009
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42 results for Nick Fuller
High performance and highly uniform gate-all-around silicon nanowire MOSFETs with wire size dependent scaling
- S. Bangsaruntip
- G.M. Cohen
- et al.
- 2009
- IEDM 2009
Trigate 6T SRAM scaling to 0.06 μm2
- M. Guillorn
- J. Chang
- et al.
- 2009
- IEDM 2009
Demonstration of highly scaled FinFET SRAM cells with high-Κ/metal gate and investigation of characteristic variability for the 32 nm node and beyond
- H. Kawasaki
- M. Khater
- et al.
- 2008
- IEDM 2008
A 45 nm CMOS node Cu/low-k/ ULtra low-k PECVD SiCOH (k=2.4) BEOL technology
- S. Sankaran
- S. Arai
- et al.
- 2006
- IEDM 2006
Nanoporous materials integration into advanced microprocessors
- E. Todd Ryan
- Cathy Labelle
- et al.
- 2005
- MRS Spring Meeting 2005
Aggressively scaled (0.143 μm 2) 6T-SRAM cell for the 32 nm node and beyond
- D. Fried
- J. Hergenrother
- et al.
- 2004
- IEDM 2004
Mronline: MapReduce online performance tuning
- Min Li
- Liangzhao Zeng
- et al.
- 2014
- HPDC 2014
Patterning of CMOS device structures for 40-80nm pitches and beyond
- Sebastian U. Engelmann
- R.M. Martin
- et al.
- 2012
- SPIE Advanced Lithography 2012
The effects of plasma exposure on low-k dielectric materials
- J.L. Shohet
- H. Ren
- et al.
- 2012
- SPIE Advanced Lithography 2012