Stacked nanosheet gate-all-around transistor to enable scaling beyond FinFET
- N. Loubet
- T.B. Hook
- et al.
- 2017
- VLSI Technology 2017
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74 results for Vamsi Paruchuri
Comparison of key fine-line BEOL metallization schemes for beyond 7 nm node
- Takeshi Nogami
- X. Zhang
- et al.
- 2017
- VLSI Technology 2017
Understanding the interfacial layer formation on strained Si1-xGex channels and their correlation to inversion layer hole mobility
- Choonghyun Lee
- Richard G. Southwick
- et al.
- 2017
- VLSI Technology 2017
Cobalt/copper composite interconnects for line resistance reduction in both fine and wide lines
- Takeshi Nogami
- Raghuveer Patlolla
- et al.
- 2017
- IITC 2017
Reliable airgap BEOL technology in advanced 48 nm pitch copper/ULK interconnects for substantial power and performance benefits
- C. J. Penny
- S. Gates
- et al.
- 2017
- IITC 2017
A 7nm FinFET technology featuring EUV patterning and dual strained high mobility channels
- Ruilong Xie
- Pietro Montanini
- et al.
- 2016
- IEDM 2016
FINFET technology featuring high mobility SiGe channel for 10nm and beyond
- Dechao Guo
- G. Karve
- et al.
- 2016
- VLSI Technology 2016
Selective GeOx-scavenging from interfacial layer on Si1-xGex channel for high mobility Si/Si1-xGex CMOS application
- Choonghyun Lee
- H. Kim
- et al.
- 2016
- VLSI Technology 2016
BEOL process integration for the 7 nm technology node
- T. Standaert
- Genevieve Beique
- et al.
- 2016
- IITC/AMC 2016
Ultrathin conformal multilayer SiNO dielectric cap for capacitance reduction in Cu/low k interconnects
- Deepika Priyadarshini
- Son Van Nguyen
- et al.
- 2016
- IITC/AMC 2016