A time-dependent clustering model for non-uniform dielectric breakdown
- Ernest Y. Wu
- B. Li
- et al.
- 2013
- IEDM 2013
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13 results for P. McLaughlin
22nm High-performance SOI technology featuring dual-embedded stressors, Epi-Plate High-K deep-trench embedded DRAM and self-aligned Via 15LM BEOL
- S. Narasimha
- P. Chang
- et al.
- 2012
- IEDM 2012
Chip package interaction evaluation for a high performance 65nm and 45nm CMOS technology in a stacked die package with C4 and wirebond interconnections
- Christopher Muzzy
- David Danovitch
- et al.
- 2008
- ECTC 2008
A 45 nm CMOS node Cu/low-k/ ULtra low-k PECVD SiCOH (k=2.4) BEOL technology
- S. Sankaran
- S. Arai
- et al.
- 2006
- IEDM 2006
High performance 65 nm SOI technology with enhanced transistor strain and advanced-low-K BEOL
- W.-H. Lee
- A. Waite
- et al.
- 2005
- IEDM 2005
Reliable airgap BEOL technology in advanced 48 nm pitch copper/ULK interconnects for substantial power and performance benefits
- C. J. Penny
- S. Gates
- et al.
- 2017
- IITC 2017
65nm Cu integration and interconnect reliability in low stress K=2.75 SiCOH
- V. McGahay
- G. Bonilla
- et al.
- 2006
- IITC 2006
A SiCOH BEOL interconnect technology for high density and high performance 65 nm CMOS applications
- Matthew Angyal
- Jason Gill
- et al.
- 2005
- AMC 2005
BEOL process integration with Cu/SiCOH (k=2.8) low-k interconnects at 65nm groundrules
- S. Lane
- M. Fukasawa
- et al.
- 2005
- AMC 2005
BEOL process integration with Cu/SiCOH (k=2.8) low-k interconnects at 65 nm groundrules
- M. Fukasawa
- S. Lane
- et al.
- 2005
- IITC 2005