Silicon-on-insulator MOSFETs with hybrid crystal orientations
- M. Yang
- K.K. Chan
- et al.
- 2006
- VLSI Technology 2006
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51 results for Jeffrey W. Sleight
Challenges and opportunities for high performance 32 nm CMOS technology
- J. Sleight
- I. Lauer
- et al.
- 2006
- IEDM 2006
OFF-state modulation of SOI floating-body
- Josephine B. Chang
- Jeffrey W. Sleight
- et al.
- 2006
- IEEE Electron Device Letters
Effect of tensile uniaxial stress on the electron transport properties of deeply scaled FD-SOI n-type MOSFETs
- H. Nayfeh
- D. Singh
- et al.
- 2006
- IEEE Electron Device Letters
Strained ultrahigh performance fully depleted nMOSFETs with ft of 330 GHz and sub-30-nm gate lengths
- D. Singh
- Keith A. Jenkins
- et al.
- 2006
- IEEE Electron Device Letters
Mobility and CMOS devices/circuits on sub-10nm (110) ultra thin body SOI
- Huiling Shang
- J. Rubino
- et al.
- 2005
- VLSI Technology 2005
Stress memorization in high-performance FDSOI devices with ultra-thin silicon channels and 25nm gate lengths
- D. Singh
- J. Sleight
- et al.
- 2005
- IEDM 2005
Effect of contact liner stress in high-performance FDSOI devices with ultra-thin silicon channels and 30 nm gate lengths
- D. Singh
- J. Hergenrother
- et al.
- 2005
- IEEE International SOI Conference 2005
Stable SRAM cell design for the 32 nm node and beyond
- Leland Chang
- David M. Fried
- et al.
- 2005
- VLSI Technology 2005
Role of oxygen vacancies in VFB/Vt stability of pFET metals on HfO2
- E. Cartier
- F.R. McFeely
- et al.
- 2005
- VLSI Technology 2005