Technology viable DC performance elements for Si/SiGe channel CMOS FinFTT
- G. Tsutsui
- Ruqiang Bao
- et al.
- 2016
- IEDM 2016
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32 results for Ruqiang Bao
High performance 14nm SOI FinFET CMOS technology with 0.0174μm2 embedded DRAM and 15 levels of Cu metallization
- C.-H.C-H. Lin
- Brian Greene
- et al.
- 2014
- IEDM 2014
Replacement metal gate resistance in FinFET architecture modelling, validation and extendibility
- Ruqiang Bao
- Brian Greene
- et al.
- 2015
- IEDM 2015
An Analytical Metal Resistance Model and Its Application for Sub-22-nm Metal-Gate CMOS
- X. Miao
- Ruqiang Bao
- et al.
- 2015
- IEEE Electron Device Letters
SiGe Gate-All-around Nanosheet Reliability
- Huimei Zhou
- Miaomiao Wang
- et al.
- 2022
- IRPS 2022
Enabling Next Generation CMOS by Novel EOT Scaling Module
- Lin Dong
- Steven Hung
- et al.
- 2021
- VLSI Technology 2021
Challenges and Opportunities for Stacked Transistor: DTCO and Device
- J. Wang
- S.D. Suk
- et al.
- 2021
- VLSI Technology 2021
TDDB Reliability in Gate-All-Around Nanosheet
- Huimei Zhou
- Miaomiao Wang
- et al.
- 2021
- IRPS 2021
Selective Enablement of Dual Dipoles for near Bandedge Multi-Vt Solution in High Performance FinFET and Nanosheet Technologies
- Ruqiang Bao
- K. Watanabe
- et al.
- 2020
- VLSI Technology 2020
NBTI Impact of Surface Orientation in Stacked Gate-All-Around Nanosheet Transistor
- Huimei Zhou
- Miaomiao Wang
- et al.
- 2020
- IRPS 2020