Density scaling with gate-all-around silicon nanowire MOSFETs for the 10 nm node and beyond
- Sarunya Bangsaruntip
- K. Balakrishnan
- et al.
- 2013
- IEDM 2013
Publications
99 results for Robert L. Bruce
200 mm wafer-scale integration of sub-20 nm sacrificial nanofluidic channels for manipulating and imaging single DNA molecules
- C. Wang
- S.W. Nam
- et al.
- 2013
- IEDM 2013
A scalable volume-confined phase change memory using physical vapor deposition
- S.C. Lai
- S. Kim
- et al.
- 2013
- VLSI Technology 2013
Investigation of plasma etch damage to porous oxycarbosilane ultra low-k dielectric
- Robert Bruce
- Sebastian Engelmann
- et al.
- 2013
- Journal of Physics D: Applied Physics
Advanced plasma etch for the 10nm node and beyond
- 2013
- SPIE Advanced Lithography 2013
Highly selective silicon nitride etching to Si and SiO2 for a gate sidewall spacer using a CF3I/O2/H2 neutral beam
- Daiki Nakayama
- Akira Wada
- et al.
- 2013
- Journal of Physics D: Applied Physics
Patterning of CMOS device structures for 40-80nm pitches and beyond
- Sebastian U. Engelmann
- R.M. Martin
- et al.
- 2012
- SPIE Advanced Lithography 2012
Post Porosity Plasma Protection applied to a wide range of ultra low-k materials
- Theo Frot
- Willi Volksen
- et al.
- 2012
- IITC 2012
Pattern collapse mitigation strategies for EUV Lithography
- Dario L. Goldfarb
- Robert L. Bruce
- et al.
- 2012
- SPIE Advanced Lithography 2012
Post porosity plasma protection: Scaling of efficiency with porosity
- Theo Frot
- Willi Volksen
- et al.
- 2012
- Advanced Functional Materials