Virtual de-embedding study for the accurate extraction of Fin FET gate resistance
- Shireen Warnock
- Rob Groves
- et al.
- 2014
- CICC 2014
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32 results for Richard A. Wachnik
Gate stack resistance and limits to CMOS logic performance
- Richard A. Wachnik
- S. Lee
- et al.
- 2013
- CICC 2013
Experimental analysis and modeling of self heating effect in dielectric isolated planar and fin devices
- S. Lee
- Richard A. Wachnik
- et al.
- 2013
- VLSI Technology 2013
An efficient and accurate schematic transistor model of FinFET parasitic elements
- Ning Lu
- Terence B. Hook
- et al.
- 2013
- NSTI-Nanotech 2013
A fully automated method to create Monte-Carlo MOSFET model libraries for statistical circuit simulations
- Jing Wang
- Henry Trombley
- et al.
- 2012
- NSTI-Nanotech 2012
RF modeling of 45nm low-power CMOS technology
- Jing Wang
- Hongmei Li
- et al.
- 2009
- NSTI-Nanotech 2009
Progress in SiGe technology toward fully integrated mmwave ICs
- B.P. Gaucher
- S.K. Reynolds
- et al.
- 2006
- ISTDM 2006
Thermal cycle reliability of stacked via structures with copper metallization and an organic low-k dielectric
- R. Filippi
- J.F. McGrath
- et al.
- 2004
- IRPS 2004
Thermal cycle reliability of stacked via structures with copper metallization and an organic low-k dielectric
- R. Filippi
- J.F. McGrath
- et al.
- 2004
- IRPS 2004
Breakdown measurements of ultra-thin SiO2 at low voltage
- J.H. Stathis
- A. Vayshenker
- et al.
- 2000
- VLSI Technology 2000