Device scaling limits of Si MOSFETs and their application dependencies
- David J. Frank
- Robert H. Dennard
- et al.
- 2001
- Proceedings of the IEEE
Publications
167 results for Paul Solomon
Triple-self-aligned, planar double-gate MOSFETs: Devices and circuits
- K.W. Guarini
- P. Solomon
- et al.
- 2001
- Technical Digest-International Electron Devices Meeting
100 nm gate lithography for double gate transistors
- Azalia Krasnoperova
- Ying Zhang
- et al.
- 2001
- Proceedings of SPIE - The International Society for Optical Engineering
Technology for the fabrication of ultrashort channel metal–oxide–semiconductor field-effect transistors
- J. Knoch
- J. Appenzeller
- et al.
- 2001
- Journal of Vacuum Science and Technology A: Vacuum, Surfaces and Films
Preparation of 200 mm silicon substrates with metal ground-plane for double-gate SOI devices
- L.J. Huang
- K.K. Chan
- et al.
- 2000
- IEEE International SOI Conference 2000
Scheme for the fabrication of ultrashort channel metal-oxide-semiconductor field-effect transistors
- J. Appenzeller
- R. Martel
- et al.
- 2000
- Applied Physics Letters
Ultrathin 600°C wet thermal silicon dioxide
- J. Appenzeller
- J.A. Del Alamo
- et al.
- 2000
- Electrochemical and Solid-State Letters
Device innovation and material challenges at the limits of CMOS technology
- P. Solomon
- 2000
- Annual Review of Materials Science
Characterization of the silicon on insulator film in bonded wafers by high resolution X-ray diffraction
- G.M. Cohen
- P.M. Mooney
- et al.
- 1999
- Applied Physics Letters
Nanoscale CMOS
- Hon-Sum Philip Wong
- David J. Frank
- et al.
- 1999
- Proceedings of the IEEE