B. Laikhtman, P. Solomon
Journal of Applied Physics
200 mm silicon substrates are fabricated using metal ground-plane for double-gate silicon-on-insulator (SOI) devices. The composite substrate using wafer technology were used in the fabrication of nanoscale double-gate SOI devices with metal gates. The compatibility of tungsten and chemical vapor deposition (CVD) silicon dioxide were discussed using the passivation of the CVD W layer and intermediate layers.
B. Laikhtman, P. Solomon
Journal of Applied Physics
A. Zaslavsky, K.R. Milkove, et al.
Applied Physics Letters
S. Tiwari, F. Rana, et al.
IEDM 1995
G.M. Cohen, C. Cabral Jr., et al.
MRS Proceedings 2001