Channel design and mobility enhancement in strained germanium buried channel MOSFETs
- H. Shang
- J.O. Chu
- et al.
- 2004
- VLSI Technology 2004
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15 results for Ko-Tao Lee
Strained Si CMOS (SS CMOS) technology: Opportunities and challenges
- K. Rim
- R. Anderson
- et al.
- 2003
- Solid-State Electronics
Characteristics and device design of sub-100 nm strained Si N- and PMOSFETs
- K. Rim
- J.O. Chu
- et al.
- 2002
- VLSI Technology 2002
Experimental High Performance Sub-0.1 μm Channel nMOSFET's
- Y. Mii
- S. Rishton
- et al.
- 1994
- IEEE Electron Device Letters
High performance 0.1μm nMOSFET's with 10 ps/stage delay (85 K) at 1.5 V power supply
- Y. Mii
- S. Rishton
- et al.
- 1993
- VLSI Technology 1993