RTA-driven intra-die variations in stage delay, and parametric sensitivities for 65nm technology
- I. Ahsan
- N. Zamdmer
- et al.
- 2006
- VLSI Technology 2006
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50 results for Greg Freeman
Pushing the performance limits of SiGe HBT technology
- Marwan Khater
- Thomas Adam
- et al.
- 2006
- ECS Meeting 2006
Optimizing history effects in 65nm PD-SOI CMOS
- Q. Liang
- T. Kawamura
- et al.
- 2006
- IEEE International SOI Conference 2006
High performance 65 nm SOI technology with dual stress liner and low capacitance SRAM cell
- E. Leobandung
- H. Nayakama
- et al.
- 2005
- VLSI Technology 2005
High-performance silicon-germanium technology
- Seshadri Subbanna
- Greg Freeman
- et al.
- 2005
- DRC 2005
RFCMOS technology from 0.25μm to 65nm: The state of the art
- J.J. Pekarik
- D.R. Greenberg
- et al.
- 2004
- CICC 2004
SiGe HBTs for millimeter-wave applications with simultaneously optimized f T and f max of 300 GHz
- J.-S. Rieh
- D.R. Greenberg
- et al.
- 2004
- RFIC 2004
Low-noise performance near BVCEO in a 200 GHz SiGe technology at different collector design points
- D.R. Greenberg
- S. Sweeney
- et al.
- 2003
- IMS 2003
Noise performance scaling in high-speed silicon RF technologies
- D.R. Greenberg
- S. Sweeney
- et al.
- 2003
- SiRF 2003
Sige HBT performance and reliability trends through fT of 350GHz
- Greg Freeman
- Jae-Sung Rieh
- et al.
- 2003
- IRPS 2003