Representative traces for processor models with infinite cache
- V.S. Iyengar
- Louise Trevillyan
- et al.
- 1996
- HPCA 1996
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137 results for Pradip Bose
Architectural timing verification of CMOS RISC processors
- Pradip Bose
- S. Surya
- 1995
- IBM J. Res. Dev
Early performance estimation of super scalar machine models
- Pradip Bose
- 1991
- ICCD 1991
Parallel logic/fault simulation of VLSI array logic
- Pradip Bose
- 1987
- ICCAD 1987
A Novel Technique for Efficient Parallel Implementation of a Classical Logic/ Fault Simulation Problem
- Pradip Bose
- 1988
- IEEE TC
OPTIMAL CODE GENERATION ALGORITHMS FOR ARITHMETIC EXPRESSIONS EXECUTING ON PIPELINED, DECOUPLED ARCHITECTURES.
- Pradip Bose
- 1985
- ICCD 1985
OPTIMAL CODE GENERATION FOR EXPRESSIONS ON SUPER SCALAR MACHINES.
- Pradip Bose
- 1985
- Fall Joint Computer Conference 1985