A 300-mm wafer-level three-dimensional integration scheme using tungsten through-silicon via and hybrid cu-adhesive bonding
- F. Liu
- R.R. Yu
- et al.
- 2008
- IEDM 2008
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47 results for Leathen Shi
Enabling SOI-based assembly technology for three-dimensional (3D) integrated circuits (ICs)
- A. Topol
- D.C. La Tulipe
- et al.
- 2005
- IEDM 2005
Enabling technologies for wafer-level bonding of 3D MEMS and integrated circuit structures
- Anna W. Topol
- Bruce K. Furman
- et al.
- 2004
- ECTC 2004
Fabrication and Mobility Characteristics of Ultra-thin Strained Si Directly on Insulator (SSDOI) MOSFETs
- K. Rim
- K.K. Chan
- et al.
- 2003
- IEDM 2003
High Performance CMOS Fabricated on Hybrid Substrate with Different Crystal Orientations
- M. Yang
- M. Ieong
- et al.
- 2003
- IEDM 2003
Electrical integrity of state-of-the-art 0.13 μm SOI CMOS devices and circuits transferred for three-dimensional (3D) integrated circuit (IC) fabrication
- K.W. Guarini
- A. Topol
- et al.
- 2002
- IEDM 2002
Extreme scaling with ultra-thin Si channel MOSFETs
- Bruce Doris
- Meikei Ieong
- et al.
- 2002
- IEDM 2002
Very high performance 50 nm CMOS at low temperature
- S.J. Wind
- L.T. Shi
- et al.
- 1999
- IEDM 1999
Pb-free solder alloys for flip chip applications
- S.K. Kang
- J. Horkans
- et al.
- 1999
- ECTC 1999
Novel elastomeric connector for packaging interconnections, testing and burn-in applications
- D.Y. Shih
- Brian Beaman
- et al.
- 1995
- ECTC 1995