Reliable Chiplet Integration on High Density Laminate (2.X D) for AI Hardware
- Divya Taneja
- Jonathan Grenier
- et al.
- 2024
- ECTC 2024
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18 results for Thomas Wassick
Scalable Advanced DBHi Chiplet Package Using Silicon Bridge With 30 μm-Pitch Solder Joints
- Akihiro Horibe
- Takahito Watanabe
- et al.
- 2024
- ECTC 2024
Heterogeneous Integration on Organic Interposer Substrate with fine-pitch RDL and 40 micron pitch Micro-bumps
- Katsuyuki Sakuma
- Griselda Bonilla
- et al.
- 2023
- ECTC 2023
On the path to AI hardware via chiplet integration enabled by high density organic substrates
- Griselda Bonilla
- Brian Quinlan
- et al.
- 2023
- ECTC 2023
Functional Testing of AI Cores through Thinned 3D I/O Buffer Dies in 3D Die-Stacked Modules
- Mukta Farooq
- Arvind Kumar
- et al.
- 2022
- ECTC 2022
3-D Die Stacking with 55 μm Pitch Interconnections on Advanced Ground-Rule Laminate for Artificial Intelligence System
- Katsuyuki Sakuma
- Mukta Farooq
- et al.
- 2021
- IEEE Transactions on CPMT
Chip Power-Frequency Scaling in 10/7nm Node
- Phil Oldiges
- Reinaldo A. Vega
- et al.
- 2020
- IEEE Access
Inspection / metrology evaluation of fine pitch test vehicles for advanced packages
- Feng Xue
- Joe Zou
- et al.
- 2019
- ICEP 2019
Creep characterization of solder bumps using nanoindentation
- Yingjie Du
- Xiao Hu Liu
- et al.
- 2016
- Mechanics of Time-Dependent Materials
The projection of the incidence of dielectric cracking during chip joining with lead free solder bumps
- Thomas M. Shaw
- Xiao Hu Liu
- et al.
- 2016
- IRPS 2016