Fault-tolerant designs for 256 Mb DRAM
- Toshiaki Kirihata
- Yohji Watanabe
- et al.
- 1996
- IEICE Transactions on Electronics
Publications
Date
Featured collections
Popular topics
24 results for J. DeBrosse
A 286 mm2 256 Mb DRAM with ×32 both-ends DQ
- Yohji Watanabe
- Hing Wong
- et al.
- 1996
- IEICE Transactions on Electronics
A 0.6 µm2 256Mb Trench DRAM Cell with Self-Aligned Buried Strap (BEST)
- L.A. Nesbit
- J. Alsmeier
- et al.
- 1993
- IEDM 1993
A new planarization technique, using a combination of RIE and chemical mechanical polish (CMP)
- B. Davari
- C. Koburger
- et al.
- 1989
- IEDM 1989