Challenges and opportunities for high performance 32 nm CMOS technology
- J. Sleight
- I. Lauer
- et al.
- 2006
- IEDM 2006
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188 results for Devendra Sadana
Integration of local stress techniques with strained-Si directly on insulator (SSDOI) substrates
- Haizhou Yin
- Z. Ren
- et al.
- 2006
- VLSI Technology 2006
Direct silicon bonded (DSB) substrate solid phase epitaxy (SPE) integration scheme study for high performance bulk CMOS
- Haizhou Yin
- C.Y. Sung
- et al.
- 2006
- IEDM 2006
Advanced applications of semiconductor epitaxy for cutting edge integrated circuit technology
- D.K. Sadana
- M. Yang
- et al.
- 2006
- ECS Meeting 2006
Substrate engineering for germanium-based CMOS technology
- S.W. Bedell
- K.E. Fogel
- et al.
- 2006
- ECS Meeting 2006
High mobility channels for ultimate CMOS
- D.K. Sadana
- S.J. Koester
- et al.
- 2006
- ECS Meeting 2006
Strain and lattice engineering for Ge FET devices
- S.W. Bedell
- A. Reznicek
- et al.
- 2006
- Materials Science in Semiconductor Processing
Evidence of electron and hole inversion in GaAs metal-oxide-semiconductor capacitors with HfO 2 gate dielectrics and α-Si/SiO 2 interlayers
- S.J. Koester
- E.W. Kiewra
- et al.
- 2006
- Applied Physics Letters
Single wafer sSOI by SIMOX
- J.P. De Souza
- S.W. Bedell
- et al.
- 2006
- ISTDM 2006
Amorphization/templated recrystallization (ATR) method for hybrid orientation substrates
- K.L. Saenger
- J.P. De Souza
- et al.
- 2006
- MRS Spring Meeting 2006