Contact Cavity Shaping and Selective SiGe:B Low-Temperature Epitaxy Process Solution for sub 10-9 Ω.cm2 Contact Resistivity in Nonplanar FETs
- N. Breil
- B.-C. Lee
- et al.
- 2023
- VLSI Technology 2023
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58 results for B. Haran
Gate-Last IO Transistors based on Stacked Gate-All-Around Nanosheet Architecture for Advanced Logic Technologies
- M. Bhuiyan
- M. Kim
- et al.
- 2021
- IEDM 2021
Stacked Gate-All-Around Nanosheet pFET with Highly Compressive Strained Si1-xGex Channel
- Shogo Mochizuki
- M. Bhuiyan
- et al.
- 2020
- IEDM 2020
A Novel Dry Selective Etch of SiGe for the Enablement of High Performance Logic Stacked Gate-All-Around NanoSheet Devices
- Nicolas Loubet
- T. Devarajan
- et al.
- 2019
- IEDM 2019
Multiple-Vt Solutions in Nanosheet Technology for High Performance and Low Power Applications
- Ruqiang Bao
- Reinaldo A. Vega
- et al.
- 2019
- IEDM 2019
Full Bottom Dielectric Isolation to Enable Stacked Nanosheet Transistor for Low Power and High Performance Applications
- J. Zhang
- S. Pancharatnam
- et al.
- 2019
- IEDM 2019
Advanced Arsenic Doped Epitaxial Growth for Source Drain Extension Formation in Scaled FinFET Devices
- Shogo Mochizuki
- B. Colombeau
- et al.
- 2018
- IEDM 2018
Parasitic Resistance Reduction Strategies for Advanced CMOS FinFETs beyond 7nm
- Heng Wu
- Oleg Gluschenkov
- et al.
- 2018
- IEDM 2018
Extendable and Manufacturable Volume-less Multi-Vt Solution for 7nm Technology Node and beyond
- Ruqiang Bao
- Huimei Zhou
- et al.
- 2018
- IEDM 2018
Novel Materials and Processes in Replacement Metal Gate for Advanced CMOS Technology
- Ruqiang Bao
- Steven Hung
- et al.
- 2018
- IEDM 2018