Interface state density measurements in gated p-i-n silicon nanowires as a function of the nanowire diameter
- Guy Cohen
- E. Cartier
- et al.
- 2010
- DRC 2010
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178 results for Wilfried Haensch
Effects of substrate orientation and channel stress on short-channel thin SOI MOSFETs
- Amlan Majumdar
- Christine Ouyang
- et al.
- 2010
- IEEE T-ED
Sharp reduction of contact resistivities by effective schottky barrier lowering with silicides as diffusion sources
- Zhen Zhang
- F. Pagette
- et al.
- 2010
- IEEE Electron Device Letters
High-κ/metal-gate fully depleted SOI CMOS with single-silicide schottky source/drain with sub-30-nm gate length
- Marwan H. Khater
- Zhen Zhang
- et al.
- 2010
- IEEE Electron Device Letters
Practical strategies for power-efficient computing technologies
- Leland Chang
- David J. Frank
- et al.
- 2010
- Proceedings of the IEEE
Are Si/SiGe tunneling field-effect transistors a good idea?
- Steven J. Koester
- Isaac Lauer
- et al.
- 2010
- ECS Transactions
Experimental and theoretical explanation for the orientation dependence gate-induced drain leakage in scaled MOSFETs
- P. Solomon
- S.E. Laux
- et al.
- 2009
- DRC 2009
Hydrogen silsesquioxane-based hybrid electron beam and optical lithography for high density circuit prototyping
- M. Guillorn
- J. Chang
- et al.
- 2009
- Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures
1D Broken-gap tunnel transistor with MOSFET-like on-currents and sub-60mV/dec subthreshold swing
- Siyuranga O. Koswatta
- Steven J. Koester
- et al.
- 2009
- IEDM 2009
Trigate 6T SRAM scaling to 0.06 μm2
- M. Guillorn
- J. Chang
- et al.
- 2009
- IEDM 2009