Intrinsic dielectric stack reliability of a high performance bulk planar 20nm replacement gate high-k metal gate technology and comparison to 28nm gate first high-k metal gate processW. McMahonC. Tianet al.2013IRPS 2013
Fast characterization of the Static Noise Margin degradation of cross-coupled inverters and correlation to BTI instabilities in MG/HK devicesAndreas KerberN. Pimparkaret al.2011IRPS 2011
Impact of charge trapping on the voltage acceleration of TDDB in metal gate/high-k n-channel MOSFETsA. KerberA. Vayshenkeret al.2010IRPS 2010
TDDB failure distribution of metal gate / high-k CMOS devices on SOI substratesA. KerberE. Cartieret al.2009IRPS 2009
Accurate model for time-dependent dielectric breakdown of high-k metal gate stacksT. NigamA. Kerberet al.2009IRPS 2009