A 7nm FinFET technology featuring EUV patterning and dual strained high mobility channels
- Ruilong Xie
- Pietro Montanini
- et al.
- 2016
- IEDM 2016
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17 results for Chun Chen Yeh
Comprehensive study of effective current variability and MOSFET parameter correlations in 14nm multi-fin SOI FINFETs
- Abhijeet Paul
- Andres Bryant
- et al.
- 2013
- IEDM 2013
Challenges and solutions of FinFET integration in an SRAM cell and a logic circuit for 22 nm node and beyond
- H. Kawasaki
- V.S. Basker
- et al.
- 2009
- IEDM 2009
Aggressively scaled strained-silicon-on-insulator undoped-body High-κ/Metal-Gate nFinFETs for high-performance logic applications
- Kingsuk Maitra
- Ali Khakifirooz
- et al.
- 2011
- IEEE Electron Device Letters
Capacitor-based cross-point array for analog neural network with record symmetry and linearity
- Y. Li
- S. Kim
- et al.
- 2018
- VLSI Technology 2018
Electron mobility in thin In0.53Ga0.47As channel
- Eduard Cartier
- Amlan Majumdar
- et al.
- 2017
- ESSDERC 2017
High performance and low leakage current InGaAs-on-silicon FinFETs with 20 nm gate length
- Xiao Sun
- Christopher P. D’Emic
- et al.
- 2017
- VLSI Technology 2017
10nm FINFET technology for low power and high performance applications
- D. Guo
- H. Shang
- et al.
- 2014
- ICSICT 2014
Fin width scaling for improved short channel control and performance in aggressively scaled channel length SOI finFETs
- Abhijeet Paul
- Chun-Chen Yeh
- et al.
- 2013
- S3S 2013
Analysis of parasitic resistance in double gate FinFETs with different fin lengths
- X. Yang
- Kingsuk Maitra
- et al.
- 2011
- IEEE International SOI Conference 2011