0.18 μm high-performance logic technology
- S.W. Crowder
- S. Greco
- et al.
- 1999
- VLSI Technology 1999
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19 results for Michael Hargrove
High-performance sub-0.08 μm CMOS with dual gate oxide and 9.7 ps inverter delay
- M. Hargrove
- S.W. Crowder
- et al.
- 1998
- IEDM 1998
Latchup in CMOS technology
- M. Hargrove
- S. Voldman
- et al.
- 1998
- IRPS 1998
Electrical characteristics and reliability of sub-3 nm gate oxides grown on nitrogen implanted silicon substrates
- L.K. Han
- S.W. Crowder
- et al.
- 1997
- IEDM 1997
High-performance 0.08 μm CMOS
- L. Su
- S. Subbanna
- et al.
- 1996
- VLSI Technology 1996
History dependence of non-fully depleted (NFD) digital SOI circuits
- F. Assaderaghi
- G. Shahidi
- et al.
- 1996
- VLSI Technology 1996
Low-voltage transient bipolar effect induced by dynamic floating-body charging in scaled PD/SOI MOSFET's
- Mario M. Pelella
- Jerry G. Fossum
- et al.
- 1996
- IEEE Electron Device Letters
Shallow trench isolation double-diobe electrostatic discharge circuit and interaction with DRAM output circuitry
- Steven H. Voldman
- Vaughn P. Gross
- et al.
- 1993
- Journal of Electrostatics
Numerical Solution of the Semiconductor Transport Equations with Current Boundary Conditions
- Bertrand M. Grossman
- Michael J. Hargrove
- 1983
- IEEE T-ED