Analysis of parasitic resistance in double gate FinFETs with different fin lengths
- X. Yang
- Kingsuk Maitra
- et al.
- 2011
- IEEE International SOI Conference 2011
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27 results for R.J. Miller
Sub-25nm FinFET with advanced fin formation and short channel effect engineering
- Tenko Yamashita
- Veeraraghvan S. Basker
- et al.
- 2011
- VLSI Technology 2011
Opportunities and challenges of FinFET as a device structure candidate for 14nm node CMOS technology
- Tenko Yamashita
- Veeraraghvan S. Basker
- et al.
- 2011
- CSTIC 2011
A 0.063 μm2 FinFET SRAM cell demonstration with conventional lithography using a novel integration scheme with aggressively scaled fin and gate pitch
- Veeraraghvan S. Basker
- Theodorus E. Standaert
- et al.
- 2010
- VLSI Technology 2010
New polysilicon disposable sidewall process for sub-50 nm CMOS
- K.L. Lee
- D. Boyd
- et al.
- 2001
- ESSDERC 2001
High performance of planar double gate MOSFETs with thin backgate dielectrics
- E.C. Jones
- M. Ieong
- et al.
- 2001
- DRC 2001
Surface cleaning by electrostatic removal of particles
- Douglas W. Cooper
- H.L. Wolfe
- et al.
- 1989
- Annual Technical Meeting of Institute of Environmental Sciences 1989
Acceptance criterion uncertainty during sampling inspection of wafers
- R.J. Miller
- Douglas W. Cooper
- 1989
- Annual Technical Meeting of Institute of Environmental Sciences 1989
Quantities, terminology, and symbols in photothermal and related spectroscopies (IUPAC recommendations 2004)
- Masahide Terazima
- Noboru Hirota
- et al.
- 2004
- Pure and Applied Chemistry
Adaptive wiring for 20 nm scale epitaxial silicon Ohmic contacts to silicon nanowires
- M.J. Rooks
- G.M. Cohen
- et al.
- 2007
- Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures