A 5.2GHz microprocessor chip for the IBM zEnterprise™ system
- James Warnock
- Y.-H. Chan
- et al.
- 2011
- ISSCC 2011
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11 results for S. Weitzel
The implementation of POWER7™: A highly parallel and scalable multi-core high-end server processor
- Dieter Wendel
- Ronald Kalla
- et al.
- 2010
- ISSCC 2010
The design and implementation of a first-generation CELL Processor
- D.C. Pham
- S. Asano
- et al.
- 2005
- ISSCC 2005
The design and implementation of a first-generation CELL processor
- D.C. Pham
- S. Asano
- et al.
- 2005
- ISSCC 2005
On-chip timing uncertainty measurements on IBM microprocessors
- R.L. Franch
- P. Restle
- et al.
- 2008
- IEEE ITC 2008
Key features of the design methodology enabling a multi-core SoC implementation of a first-generation CELL processor
- Dac Pham
- Hans-Werner Anderson
- et al.
- 2006
- ASP-DAC 2006
The design methodology and implementation of a first-generation CELL processor: A multi-core SoC
- D.C. Pham
- E. Behnen
- et al.
- 2005
- CICC 2005
The design and implementation of a first-generation CELL processor - A multi-core SoC
- D.C. Pham
- S. Asano
- et al.
- 2005
- ICICDT 2005
POWER7™, a highly parallel, scalable multi-core high end server processor
- Dieter F. Wendel
- Ron Kalla
- et al.
- 2011
- IEEE Journal of Solid-State Circuits
A resonant global clock distribution for the cell broadband engine processor
- Steven C. Chan
- Phillip J. Restle
- et al.
- 2009
- IEEE Journal of Solid-State Circuits