Optimization of ESCAP photoresist for x-ray lithography
- A.T.S. Pomerene
- K.E. Petrillo
- et al.
- 1994
- Microlithography 1994
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91 results for Karen Petrillo
Fabrication of high performance 512Kb SRAMs in 0.25 μm CMOS technology using x-ray lithography
- R. Viswanathan
- David Seeger
- et al.
- 1994
- Microelectronic Engineering
Process optimization of APEX-E
- Karen Petrillo
- 1993
- Microlithography 1993
A High-Performance 0.25-μm CMOS Technology: II—Technology
- Bijan Davari
- Wen-Hsing Chang
- et al.
- 1992
- IEEE T-ED
Sub-μm, planarized, Nb-AlOx-Nb Josephson process for 125 mm wafers developed in partnership with Si technology
- M.B. Ketchen
- D.J. Pearson
- et al.
- 1991
- Applied Physics Letters
Gel resist processing for submicron CMOS and bipolar circuits
- K.E. Petrillo
- M. Smyth
- et al.
- 1989
- Proceedings of SPIE 1989
A high performance liquid-nitrogen CMOS SRAM technology
- J.Y.-C. Sun
- S. Klepner
- et al.
- 1988
- ESSDERC 1988
A Highly Latchup-Immune 1-μm CMOS Technology Fabricated with 1-MeV Ion Implantation and Self-Aligned TiSi2
- Fang-Shi J. Lai
- L.K. Wang
- et al.
- 1986
- IEEE T-ED
HIGHLY LATCHUP-IMMUNE 1- mu m CMOS TECHNOLOGY FABRICATED WITH 1 Mev ION IMPLANTATION AND SELF-ALIGNED TiSi//2.
- F.S. Lai
- L.K. Wang
- et al.
- 1984
- IEDM 1984
A Self-Aligned 1-μm-Channel CMOS Technology with Retrograde n-Well and Thin Epitaxy
- Yuan Taur
- Genda J. Hu
- et al.
- 1985
- IEEE T-ED