New optimal design strategies and analysis of ultra-low leakage circuits for nano-scale SOI technology
- K. Das
- R.V. Joshi
- et al.
- 2003
- ISLPED 2003
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23 results for Peter W. Cook
New Optimal Design Strategies and Analysis of Ultra-Low Leakage Circuits for Nano-Scale SOI Technology
- Koushik K. Das
- Rajiv V. Joshi
- et al.
- 2003
- ISLPED 2003
Tradeoffs in power-efficient issue queue design
- Alper Buyuktosunoglu
- David H. Albonesi
- et al.
- 2002
- LPED 2002
Synchronous interlocked pipelines
- Hans M. Jacobson
- Prabhakar N. Kudva
- et al.
- 2002
- ASYNC 2002
Laser personalization of integrated circuits
- S.E. Schuster
- P.W. Cook
- 1989
- Proceedings of SPIE 1989
Connections and disconnections on integrated circuits using nanosecond laser pulses
- P.W. Cook
- S.E. Schuster
- et al.
- 2008
- Applied Physics Letters
Low-power synchronous-to-asynchronous-to-synchronous interlocked pipelined CMOS circuits operating at 3.3-4.5 GHz
- Stanley E. Schuster
- Peter W. Cook
- 2003
- IEEE Journal of Solid-State Circuits
Power-aware microarchitecture: Design and modeling challenges for next-generation microprocessors
- David M. Brooks
- Pradip Bose
- et al.
- 2000
- IEEE Micro
Measurement and modeling of on-chip transmission line effects in a 400 MHz microprocessor
- P. Restle
- Keith A. Jenkins
- et al.
- 1998
- IEEE Journal of Solid-State Circuits
Second-Generation RISC Floating Point with Multiply-Add Fused
- Erdem Hokenek
- Robert K. Montoye
- et al.
- 1990
- IEEE Journal of Solid-State Circuits