Fast-lock hybrid PLL combining fractional-N and integer-N modes of differing bandwidths
- Kyoungho Woo
- Yong Liu
- et al.
- 2008
- IEEE Journal of Solid-State Circuits
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A Wide Power Supply Range, Wide Tuning Range, All Static CMOS All Digital PLL in 65 nm SOI
- José A. Tierno
- Alexander V. Rylyakov
- et al.
- 2008
- IEEE Journal of Solid-State Circuits
A 500 MHz Random Cycle, 1.5 ns Latency, SOI Embedded DRAM Macro Featuring a Three-Transistor Micro Sense Amplifier
- John Barth
- William R. Reohr
- et al.
- 2008
- IEEE Journal of Solid-State Circuits
An 8T-SRAM for variability tolerance and low-voltage operation in high-performance caches
- Leland Chang
- Robert K. Montoye
- et al.
- 2008
- IEEE Journal of Solid-State Circuits
A sub-600-mV, fluctuation tolerant 65-nm CMOS SRAM array with dynamic cell biasing
- Azeez J. Bhavnagarwala
- Stephen Kosonocky
- et al.
- 2008
- IEEE Journal of Solid-State Circuits
Low-power circuits for a 2.5-V, 10.7-to-86-Gb/s serial transmitter in 130-nm SiGe BiCMOS
- Timothy O. Dickson
- Sorin P. Voinigescu
- 2007
- IEEE Journal of Solid-State Circuits
Modeling, design, and verification for the analog front-end of a MEMS-based parallel scanning-probe storage device
- Christoph Hagleitner
- Tony Bonaccio
- et al.
- 2007
- IEEE Journal of Solid-State Circuits
An ultra-compact differentially tuned 6-GHz CMOS LC-VCO with dynamic common-mode feedback
- Babak Soltanian
- Herschel Ainspan
- et al.
- 2007
- IEEE Journal of Solid-State Circuits
On-line global energy optimization in multi-core systems using principles of analog computation
- Zeynep Toprak Deniz
- Yusuf Leblebici
- et al.
- 2007
- IEEE Journal of Solid-State Circuits
A 20 dBm fully-integrated 60 GHz SiGe power amplifier with automatic level control
- Ullrich R. Pfeiffer
- David Goren
- 2007
- IEEE Journal of Solid-State Circuits