Technologies to further reduce soft error susceptibility in SOI
- P. Oldiges
- R.H. Dennard
- et al.
- 2009
- IEDM 2009
Publications
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16 results at IEDM 2009
Challenges and solutions of FinFET integration in an SRAM cell and a logic circuit for 22 nm node and beyond
- H. Kawasaki
- V.S. Basker
- et al.
- 2009
- IEDM 2009
Reduction of random telegraph noise in high-κ / metal-gate stacks for 22 nm generation FETs
- N. Tega
- H. Miki
- et al.
- 2009
- IEDM 2009
Extremely thin SOI (ETSOI) CMOS with record low variability for low power system-on-chip applications
- K. Cheng
- A. Khakifirooz
- et al.
- 2009
- IEDM 2009
Can carbon nanotube transistors be scaled without performance degradation?
- Aaron D. Franklin
- George Tulevski
- et al.
- 2009
- IEDM 2009
Scaling deep trench based eDRAM on SOI to 32nm and beyond
- G. Wang
- D. Anand
- et al.
- 2009
- IEDM 2009
1D Broken-gap tunnel transistor with MOSFET-like on-currents and sub-60mV/dec subthreshold swing
- Siyuranga O. Koswatta
- Steven J. Koester
- et al.
- 2009
- IEDM 2009
Physical model of the impact of metal grain work function variability on emerging dual metal gate MOSFETs and its implication for SRAM reliability
- Xiao Zhang
- Jing Li
- et al.
- 2009
- IEDM 2009
Competitive and cost effective high-k based 28nm CMOS technology for low power applications
- F. Arnaud
- A. Thean
- et al.
- 2009
- IEDM 2009
High performance and highly uniform gate-all-around silicon nanowire MOSFETs with wire size dependent scaling
- S. Bangsaruntip
- G.M. Cohen
- et al.
- 2009
- IEDM 2009