Superconducting VLSI Logic Cell Library Using DC-Powered Clockless Dynamic SFQ Gates and ASIC-Style Layout Template
- Sergey Rylov
- Matthew Beck
- et al.
- 2023
- IEEE TAS
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65 results at IEEE TAS
Characterization of Uniformity in Nb/NbxSi1-x/Nb Josephson Junctions
- Ian W. Haygood
- Eric R. J. Edwards
- et al.
- 2019
- IEEE TAS
ERSFQ Power Delivery: A Self-Consistent Model/Hardware Case Study
- Mark B. Ketchen
- John Timmerwilke
- et al.
- 2019
- IEEE TAS
Planarized Process for Single-Flux-Quantum Circuits with Self-Shunted Nb/NbxSi1-x/Nb Josephson Junctions
- David Olaya
- Manuel Castellanos-Beltran
- et al.
- 2019
- IEEE TAS
Silicon Technology Inspired Test Structures and Methodology for SFQ Model-to Hardware Correlation
- Manjul Bhushan
- John Timmerwilke
- et al.
- 2019
- IEEE TAS
Clockless Dynamic SFQ and Gate With High Input Skew Tolerance
- Sergey V. Rylov
- 2019
- IEEE TAS
ERSFQ 8-Bit Parallel Arithmetic Logic Unit
- Alex F. Kirichenko
- Igor V. Vernik
- et al.
- 2019
- IEEE TAS
Investigating surface loss effects in superconducting transmon qubits
- 2017
- IEEE TAS
Reducing Spontaneous Emission in Circuit Quantum Electrodynamics by a Combined Readout/Filter Technique
- Nicholas T. Bronn
- Easwar Magesan
- et al.
- 2015
- IEEE TAS
Towards 32-bit energy-efficient superconductor RQL processors: The cell-level design and analysis of key processing and on-chip storage units
- Mikhail Dorojevets
- Zuoting Chen
- et al.
- 2015
- IEEE TAS