Jim Mazza

Publications

• Block-Level Design Optimization for Sub-100-nm Cell Height Libraries with Stacked Transistor

  • • Nick Lanzillo
    • Jim Mazza
    • et al.
  • 2025
  • IEDM 2025

• NanoStack Transistor Architecture for CMOS 7A Node and Beyond

  • • Shay Reboh
    • Chen Zhang
    • et al.
  • 2025
  • VLSI Technology and Circuits 2025

• Monolithic Stacked FET with Stepped Channels for Future Logic Technologies

  • • Chen Zhang
    • Seungmin Song
    • et al.
  • 2024
  • IEDM 2024