A 75GHz PLL front-end integration in 65nm SOI CMOS technology
Daeik Kim, Jonghae Kim, et al.
VLSI Circuits 2007
This paper presents five-stage and seven-stage traveling-wave amplifiers (TWA) in a 0.12-μm SOI CMOS technology. The five-stage TWA has a 4-91-GHz bandpass frequency with a gain of 5 dB. The seven-stage TWA has a 5-86-GHz bandpass frequency with a gain of 9 dB. The seven-stage TWA has a measured 18-GHz noise figure, output 1-dB compression point, and output third-order intercept point of 5.5 dB, 10 dBm, and 15.5 dBm, respectively. The power consumption is 90 and 130 mW for the fivestage and seven-stage TWA, respectively, at a voltage power supply of 2.6 V. The chips occupy an area of less than 0.82 and 1 mm for the five-stage and seven-stage TWA, respectively.
Daeik Kim, Jonghae Kim, et al.
VLSI Circuits 2007
Daeik D. Kim, Jonghae Kim, et al.
ISSCC 2007
Noah Zamdmer, Jonghae Kim, et al.
VLSI Technology 2004
Ongyeun Cho, Daeik D. Kim, et al.
IEEE Trans Semicond Manuf