Latch-to-latch CMOS-driven optical link at 28 Gb/s
Benjamin G. Lee, Seongwon Kim, et al.
CLEO 2014
This letter reports on the room temperature operation of a conventional SiGe bipolar ECL ring oscillator with a minimum stage delay of 4.2 ps for ∼250 mV single ended voltage swing. To our knowledge, this is the lowest reported delay for a gate fabricated using transistor devices. The circuit uses 0.12 × 2 μm 2 emitter size SiGe n-p-n transistors with a room temperature f T of 207 GHz and f MAX (unilateral gain extrapolation) of 285 GHz. The ring oscillator was studied as a function of various device and circuit parameters and it was found that minimum delay is more dependent on the parasitic resistance and capacitance in the n-p-n device than on pure transit time across the device.
Benjamin G. Lee, Seongwon Kim, et al.
CLEO 2014
Benjamin G. Lee, Alexander V. Rylyakov, et al.
CLEO-SI 2013
Jae-Sung Rieh, Basanth Jagannathan, et al.
IEEE T-MTT
Fuad E. Doany, Benjamin G. Lee, et al.
OFC/NFOEC 2012