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Flexible test mode design for DRAM characterization
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This paper reports the experimental results of the first CMOS active pixel image sensors (APS) fabricated using a high-performance 1.8-V, 0.25-/spl mu/m CMOS logic technology. No process modifications were made to the CMOS logic technology so that the impact of device scaling on the image sensing performance can be studied. This paper highlights the device and process design considerations required to enable CMOS as an image sensor technology. © 1963-2012 IEEE.
H. Wong, T. Kirihata, et al.
VLSI Circuits 1996
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