Robert W. Keyes
Physical Review B
ESD robustness of 4 kV HBM is achieved in CMOS-on-SOI ESD protection networks in an advanced sub-0.25 μm mainstream CMOS-on-SOI technology. Design layout, body contact, floating-gate effects and novel ESD protection implementations are discussed. © 1998 Elsevier Science B.V.
Robert W. Keyes
Physical Review B
Julian J. Hsieh
Journal of Vacuum Science and Technology A: Vacuum, Surfaces and Films
S. Cohen, J.C. Liu, et al.
MRS Spring Meeting 1999
J.R. Thompson, Yang Ren Sun, et al.
Physica A: Statistical Mechanics and its Applications