Design and Characterization of a CMOS Off-Chip Driver/Receiver with Reduced Power-Supply Disturbance

A CMOS off-chip signal driver with 2.5-3⨯smaller di / dt noise than the conventional design without incurring the penalty of signal delay is described. It minimizes L di / dt effects by reducing the output signal swing by about a factor of 2 and by providing a controlled ramp rate for the output current. The circuit has a nearly constant output resistance for source termination of transmission lines, and includes a receiver designed for the smaller signal swing. Simulations show a driver-receiver delay of 3 ns for a 7.5-cm line on a multichip package with a peak di / dt of only 12 mA/ns. Driver-receiver delay and noise measurements are also presented. © 1992 IEEE