Development of Epitaxial SiGeB as a Test Vehicle to Evaluate Source-Drain Etchout during Channel Release of Gate-all-Around Devices: Topic/category: AEPM: Advanced Equipment Processes and Materials

Abstract

Nanosheet (NS) gate-all-around (GAA) technology will be replacing finFET devices due to improved device performance and area scaling [1]. A significant challenge in NS GAA technology is etchout (EO) of the source/drain (S/D) EPI during channel release (CR). Optimizing inner spacer (IS) shape and thickness and CR chemistry are some of the key factors required to eliminate EO. To characterize the mechanisms driving EO and quickly identify and solutions require a short loop (SL) test vehicle that is susceptible to EO. Our traditional pFET SL that is used for structural and electrical evaluation of NS GAA devices used SiB S/D epi, which is not susceptible to EO due to the high selectivity of the CR chemistry to SiB. SiGeB is easily etched by CR chemistry. Therefore, it was necessary for us to develop a SL with SiGeB S/D in order to evaluate EO. We developed a selective epitaxial SiGeB process with good structural integrity that showed large performance increase over our traditional SiB-based SL, providing a good test vehicle for evaluating and improving EO. We characterized the structural and electrical properties of this process with various techniques. Finally, we used this SL to identify which CR chemistries had the best etchout performance.