Fully scaled 0.5 μm MOS circuits by synchrotron radiation X-ray lithography: Devices fabrication and overlay evaluation

Abstract

Functional NMOS and CMOS circuits with fully-scaled 0.5 μm ground rules have been fabricated using synchroton radiation X-ray lithography for all device levels. The exposures were done at the VUV storage ring of the National Synchrotron Light Source at Brookhaven National Laboratory using a mask/wafer aligner developed at IBM Research. The performance of the aligner on both test wafers and device wafers is discussed, with emphasis on overlay. Characteristics of the fabricated circuits are also presented. © 1989.