IBM Lithography Roadmap and Need for Future Lithography Tools

Semiconductor lithography resolution has been driven by decreasing wavelength and increasing NA for the last fifty years. Future technology scaling requirements necessitate continued improvements in lithographic tooling beyond “high” 0.55 NA EUV exposure tools. This presentation will review outlooks for technology pitch scaling, timing and potential options for future lithographic tooling. Both “hyper” 0.75 NA EUV and shorter wavelength at low NA potential tools will be examined. The implications of future wavelength and NA choices on depth-of-focus, stochastic induced edge placement error and design-rule flexibility will be described. Robust three-beam imaging, at pitches the semiconductor industry will need to be patterning in the 2nd half of the next decade, can be achieved if lithography tools utilizing wavelengths shorter than 5nm and NAs less than 0.4 can be built.