Conference paper
Investigations of silicon nano-crystal floating gate memories
Arvind Kumar, Jeffrey J. Welser, et al.
MRS Spring 2000
The fabrication of integrated complementary metal-oxide-semiconductor devices and circuits that scale into the sub-100nm regime is presented. While the devices are essentially conventional in design, significant innovations have been required to build them. These innovations combine new materials, lithography, etching, and processing technologies. Moreover, theoretical models of novel devices, such as the double gate transistor, suggest that metal-oxide-semiconductor field-effect transistors may be scaled down to gate lengths of 30nm.
Arvind Kumar, Jeffrey J. Welser, et al.
MRS Spring 2000
A. Ney, R. Rajaram, et al.
Journal of Magnetism and Magnetic Materials
Ronald Troutman
Synthetic Metals
H.D. Dulman, R.H. Pantell, et al.
Physical Review B