32nm general purpose bulk CMOS technology for high performance applications at low voltage
- F. Arnaud
- J. Liu
- et al.
- 2008
- IEDM 2008
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81 results for Kevin Chan
High-performance nMOSFET with in-situ phosphorus-doped embedded Si:C (ISPD eSi:C) source-drain stressor
- B. Yang
- R. Takalkar
- et al.
- 2008
- IEDM 2008
Self-aligned carbon nanotube transistors with novel chemical doping
- Jia Chen
- Christian Klinke
- et al.
- 2004
- IEDM 2004
20 nm N + abrupt junction formation in Strained Si/Si 1-xGe x MOS device
- K.L. Lee
- F. Cardone
- et al.
- 2003
- IEDM 2003
Fabrication and Mobility Characteristics of Ultra-thin Strained Si Directly on Insulator (SSDOI) MOSFETs
- K. Rim
- K.K. Chan
- et al.
- 2003
- IEDM 2003
High Performance CMOS Fabricated on Hybrid Substrate with Different Crystal Orientations
- M. Yang
- M. Ieong
- et al.
- 2003
- IEDM 2003
Performance enhancement on sub-70 nm strained silicon SOI MOSFETS on ultra-thin thermally mixed strained silicon/SiGe on insulator(TM-SGOI) substrate with raised S/D
- B.H. Lee
- A.C. Mocuta
- et al.
- 2002
- IEDM 2002
High mobility p-channel germanium MOSFETS with a thin Ge oxynitride gate dielectric
- Huiling Shang
- Harald Okorn-Schmidt
- et al.
- 2002
- IEDM 2002
Carbon nanotube field effect transistors for logic applications
- Richard Martel
- Hon-Sum Philip Wong
- et al.
- 2001
- IEDM 2001
80 nm poly-silicon gated n-FETs with ultra-thin Al2O3 gate dielectric for ULSI applications
- D.A. Buchanan
- E. Gusev
- et al.
- 2000
- IEDM 2000