Conference paperA robust reliability methodology for accurately predicting Bias Temperature Instability induced circuit performance degradation in HKMG CMOSD.P. Ioannou, K. Zhao, et al.IRPS 2011
PaperPhysical model and results of numerical simulation of the degradation of a Si/SiO2 structure as a result of annealing in vacuumG.V. Gadiyak, J.H. StathisSemiconductors
PaperLow-rate plasma oxidation of Si in a dilute oxygen/helium plasma for low-temperature gate quality Si/SiO2 interfacesA.A. Bright, J. Batey, et al.Applied Physics Letters
Conference paperA manufacturable dual channel (Si and SiGe) high-k metal gate CMOS technology with multiple oxides for high performance and low power applicationsS. Krishnan, U. Kwon, et al.IEDM 2011
