Sequential lateral solidification of silicon thin films on low-k dielectrics for low temperature integration

Abstract

We present the excimer laser crystallization of amorphous silicon on a low dielectric constant (low-k) insulator for very large scale integration monolithic 3D integration and demonstrate that low dielectric constant materials are suitable substrates for 3D integration through laser crystallization of silicon thin films. We crystallized 100 nm amorphous silicon on top of SiO2 and SiCOH (low-k) dielectrics, at different material thicknesses (1 μm, 0.75 μm, and 0.5 μm). The amorphous silicon crystallization on low-k dielectric requires 35% less laser energy than on an SiO2 dielectric. This difference is related to the thermal conductivity of the two materials, in agreement with one dimensional simulations of the crystallization process. We analyzed the morphology of the material through defect-enhanced microscopy, Raman spectroscopy, and X-ray diffraction analysis. SEM micrographs show that polycrystalline silicon is characterized by micron-long grains with an average width of 543 nm for the SiO2 sample and 570 nm for the low-k samples. Comparison of the Raman spectra does not show any major difference in film quality for the two different dielectrics, and polycrystalline silicon peaks are closely placed around 517 cm-1. From X-ray diffraction analysis, the material crystallized on SiO2 shows a preferential (111) crystal orientation. In the SiCOH case, the 111 peak strength decreases dramatically and samples do not show preferential crystal orientation. A 1D finite element method simulation of the crystallization process on a back end of line structure shows that copper (Cu) damascene interconnects reach a temperature of 70°C or lower with a 0.5 μm dielectric layer between the Cu and the molten Si layer, a favorable condition for monolithic 3D integration.