Performance test case generation for microprocessors
Pradip Bose
VTS 1998
This paper reviews sequential build-up (SBU) laminate substrate development from its beginning in 1988. It reports on developments in this technology for IBM applications since its adoption in 2000. These laminated substrates are nonuniform structures composed of three elements: a core, build-up layers, and finishing layers. Each element has evolved to meet the demands of packaging applications. Thin-film processing has greatly enhanced the wiring capability of SBU laminate substrates and has made this technology very suitable for high-performance designs. This paper focuses on the challenges encountered by IBM during the design, manufacture, and reliability testing phases of development of SBU substrates as solutions for application-specific integrated circuit (ASIC) and microprocessor packaging applications. © 2005 IBM.
Pradip Bose
VTS 1998
David S. Kung
DAC 1998
Rafae Bhatti, Elisa Bertino, et al.
Communications of the ACM
Leo Liberti, James Ostrowski
Journal of Global Optimization