Josephson 4 K-bit cache memory design for a prototype signal processor. I. General overview
- W.H. Henkels
- L.M. Geppert
- et al.
- 1985
- Journal of Applied Physics
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20 results for W.H. Chang
Josephson 4 K-bit cache memory design for a prototype signal processor. III. Decoding, sensing, and timing
- W.H. Henkels
- L.M. Geppert
- et al.
- 1985
- Journal of Applied Physics
Josephson 4 K-bit cache memory design for a prototype signal processor. II. Cell array and drivers
- W.H. Henkels
- L.M. Geppert
- et al.
- 1985
- Journal of Applied Physics
CHARACTERIZATION AND MODELING OF A LATCHUP-FREE 1- mu M CMOS TECHNOLOGY.
- Y. Taur
- W.H. Chang
- et al.
- 1983
- IEDM 1983
Punchthrough analysis of Josephson logic circuits
- E.P. Harris
- W.H. Chang
- 1983
- IEEE Transactions on Magnetics
Effect of trapped magnetic flux on the threshold curves of three-junction superconducting quantum interference devices
- W.H. Chang
- 1982
- Journal of Applied Physics
Measurement and calculation of Josephson junction device inductances
- W.H. Chang
- 1981
- Journal of Applied Physics
Numerical calculation of the inductances of a multi-superconductor transmission line system
- W.H. Chang
- 1981
- IEEE Transactions on Magnetics
Punchthrough in josephson logic devices
- E.P. Harris
- W.H. Chang
- 1981
- IEEE Transactions on Magnetics
Correction to “Analytical IC Metal-Line Capacitance Formulas
- W.H. Chang
- 1977
- IEEE T-MTT