VCSEL-based optical links in burst-mode slow optical power ramp-up and how to achieve ultra-short wake-up times
- Thomas Morf
- Marc Seifried
- et al.
- 2017
- Electronics Letters
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35 results for Alessandro Cevrero
Adaptive high-speed and ultra-low power optical interconnect for data center communications
- Ronny Henker
- Thomas Toifl
- et al.
- 2017
- ICTON 2017
A 5Gb/s 7.1fJ/b/mm 8× multi-drop on-chip 10mm data link in 14nm FinFET CMOS SOI at 0.5V
- Elisa Sacco
- Pier Andrea Francese
- et al.
- 2017
- VLSI Circuits 2017
A 12b 61dB SNDR 300MS/s SAR ADC with inverter-based preamplifier and common-mode-regulation DAC in 14nm CMOS FinFET
- Danny Luu
- Lukas Kull
- et al.
- 2017
- VLSI Circuits 2017
A 32Gb/s, 4.7pJ/bit optical link with-11.7dBm sensitivity in 14nm FinFET CMOS
- Jonathan E. Proesel
- Zeynep Toprak-Deniz
- et al.
- 2017
- VLSI Circuits 2017
A 60 Gb/s 1.9 pJ/bit NRZ optical-receiver with low latency digital CDR in 14nm CMOS FinFET
- Alessandro Cevrero
- Ilter Ozkaya
- et al.
- 2017
- VLSI Circuits 2017
A 64Gb/s 1.4pJ/b NRZ optical-receiver data-path in 14nm CMOS FinFET
- Alessandro Cevrero
- Ilter Ozkaya
- et al.
- 2017
- ISSCC 2017
A 10b 1.5GS/s pipelined-SAR ADC with background second-stage common-mode regulation and offset calibration in 14nm CMOS FinFET
- Lukas Kull
- Danny Luu
- et al.
- 2017
- ISSCC 2017
CMOS ADCs Towards 100 GS/s and beyond
- Lukas Kull
- Danny Luu
- et al.
- 2016
- CSICS 2016
Feedback delay reduction of Tomlinson- Harashima precoder in 14 nm CMOS via pipelined MAC units operated entirely with CSA arithmetic
- Marcel Kossel
- Matthias Braendli
- et al.
- 2016
- Electronics Letters