Timing analysis algorithm for circuits with level-sensitive latches
- Jin-Fuw Lee
- D.T. Tang
- et al.
- 1996
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Publications
Date
Featured collections
Popular topics
14 results for Jin-Fuw Lee
Timing analysis algorithm for circuits with level-sensitive latches
- Jin-Fuw Lee
- D.T. Tang
- et al.
- 1994
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A New Framework of Design Rules for Compaction of VLSI Layouts
- Jin-Fuw Lee
- 1988
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
VLSI Layout Compaction with Grid and Mixed Constraints
- Jin-Fuw Lee
- Donald T. Tang
- 1987
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems