Publications

8 results for L. Wissel

Stacked devices for SEU immune design
- - Phil Oldiges
  - Kenneth P. Rodbell
  - et al.
- 2010
- IEEE International SOI Conference 2010
Characterization of parasitic bipolar transistors in 45 nm silicon-on-insulator technology
- - Larry Wissel
  - Phil Oldiges
  - et al.
- 2010
- IEEE TNS
Flip-flop upsets from single-event-transients in 65 nm clock circuits
- - Larry Wissel
  - David F. Heidel
  - et al.
- 2009
- IEEE TNS
Technologies to further reduce soft error susceptibility in SOI
- - P. Oldiges
  - R.H. Dennard
  - et al.
- 2009
- IEDM 2009
Design implications of single event transients in a commercial 45 nm SOI device technology
- - Aj Kleinosowski
  - Ethan H. Cannon
  - et al.
- 2008
- IEEE TNS
Alpha-particle, carbon-ion and proton- induced flip-flop single-event-upsets in 65 nm bulk technology
- - Larry Wissel
  - Ethan H. Cannon
  - et al.
- 2008
- IEEE TNS
Circuit design and modeling for soft errors
- - A.J. KleinOsowski
  - Ethan H. Cannon
  - et al.
- 2008
- IBM J. Res. Dev
Device and circuit design issues in SOI technology
- - G. Shahidi
  - A. Ajmera
  - et al.
- 1999
- CICC 1999